1. “Efficient Hybrid Security for Networks of Simple Devices”
The Pennsylvania State University
Many networks that include very simple end nodes share a common hierarchical structure: end nodes are very limited in terms of memory and processing capability and nodes that act as gateways to a backbone network are fully capable. As an example, consider a hierarchical active RFID network or a sensor network. For many of these applications it is important that data be authenticated and encrypted. Given the limited nature of these devices, symmetric key algorithms must be used for these purposes. This requires that any two nodes wishing to communicate share a common key. In our ongoing (ending June 31, 2005) TTC project, we developed two key distribution protocols and implemented them on CrossBow Motes [2] running TinyOS and servers running Linux. One scheme operates in stand-alone mode, i.e, with no fixed infrastructure. This system allows nodes to establish session keys autonomously. The second system requires access to a Key Distribution Center (KDC) in a backbone network. This system additionally supports node authentication. Our implementation measurements have shown both systems operate efficiently albeit with tradeoffs in robustness and security. The stand-alone system is highly robust against failure but does not authenticate nodes; the KDC-based system will not work without network connectivity, but provides node authentication.
In this project we propose to:
1) design a hybrid security protocol building on our previous work that provides efficient, flexible security, i.e., if network connectivity exists, a KDC is used to provide authentication and keys without divulging any information to nodes not involved in communication; if there is no network connectivity, the system will gracefully switch to autonomous operation in which only the gateway nodes learn information from the low level nodes. The system will be designed in a way so that no more memory or processing than either system in isolation is required.
2) fully support the standardization of both the stand-alone system built in the first phase of this project, and the new hybrid system. This includes writing standards contributions, supporting documentation, and building and demonstrating prototypes that reflect the current contributions. We will support standardization in IEEE other requested venues.
3) port the software developed for the gateway nodes to a 3ETI 525N Application Processor and onto a Java platform using OSGi and J2EE technology to demonstrate the portability of the software and system design.
2. “Semi-Autonomous Wheelchair Mobility System”
The University of Pittsburgh
The University of Pittsburgh and AT Sciences are proposing a 12-month project to develop a semi-autonomous mobility aid for individuals who are completely dependent on others for their mobility needs. The device we are proposing will eliminate the current requirement that a caretaker be present to provide power, guidance, and knowledge of the destination and/or communication each time a person desires or needs to move to a different location. The use of this system will increase the independence of the person and ease the burden on caretakers to constantly be available during times of movement.
The proposed Semi-Autonomous Wheelchair Mobility System (SAWMS) will target an under-served and rapidly growing market (assisted living facilities and nursing homes for the elderly and disabled) using currently available technologies for visual tracking, object avoidance, and wireless communication, in combination with power assist wheelchair hubs for manual wheelchairs. The system will have the ability to transport an individual between locations (e.g., room to room or building to building) within a limited environment (e.g., intermediate or long term care facility, nursing home) without total support from a caretaker during the period of movement.
3. “Development of an Ultrasonic Pipeline Inspection System – Phase 1”
The Pennsylvania State University
Buried municipal infrastructure in North America has become inadequate to sustain a growing economy. Huge expenditures are needed to repair, rehabilitate, and replace public facilities. It is estimated that the cost of replacing all water mains in the United States would amount to $348 billion. The estimated cost to upgrade the water transmission and distribution systems is $77 billion. Although the federal government has spent more than $71 billion on wastewater treatment programs since 1973, the nation’s 16,000 wastewater systems still face enormous infrastructure funding needs in the next 20 years to replace pipes and other constructed facilities that have exceeded their design life. With billions being spent yearly for water and wastewater infrastructure, the systems face a shortfall of at least $21 billion annually to replace aging facilities and comply with existing and future federal water regulations. The enormity of the problem of deteriorating pipeline infrastructure is apparent. Since rebuilding the piping system is not financially realistic, municipal and utility operators require the capacity to monitor the condition of buried pipes. A reliable pipeline inspection system is necessary so that pipeline operators can develop cost effective maintenance, repair, and rehabilitation programs.
Most municipal pipeline systems in North America are inspected visually by mobile closed-circuit television (CCTV) systems to access the in-situ condition of buried pipes. The video images are examined visually and classified into grades according to extent of damage against established criteria by human operators, who are naturally prone to fatigue and subjectivity. Additionally, a current imaging system like CCTV is able to provide information from within the pipe regarding surface cracks in 2-D only and does not have the capability to provide depth perception. Any study that intends to improve the quality, reliability and effectiveness of condition assessment must aim at developing an inspection method that can add complementary pipe information (depth perception) to existing surface image assessments done on concrete pipes commonly used as gravity storm water and sewer pipes. Therefore, the researchers propose to conduct the entire research study in two phases. Phase-1 (Ultrasonic Sensor Component) will involve the development of a pipe inspection system using ultrasonic transducers and analysis software by the research team at the Non-Destructive Evaluation Laboratory at Penn State. The methods and techniques of assessing buried pipe conditions developed in this research, both hardware and software will be forged together into a package that will then be evaluated in the field. The field evaluation will be conducted in cooperation with RedZone Robotics and the Pittsburgh Water and Sewer Authority (PWSA).
4. “Adaptive Speech Processing on a “Silicon Object” Reconfigurable DSP
Product”
Valley Technologies, Inc.
Reconfigurable hardware based on a new, novel architecture for a single chip, reconfigurable DSP engine (called the Field Programmable Object Array, or FPOA) has received broad interest from the DoD community for satellite onboard processing, airborne radar and imaging applications, and ground based software defined radio communications requirements. The use of reconfigurable hardware in these applications enables the reallocation of available functionality to maximize the efficient use of system resources and adapt to changing system/mission requirements. By providing superior performance (over FPGA and DSP devices) in a compact and reconfigurable package (as opposed to an ASIC point solution), FPOA technology can provide the necessary cost/performance combination to enable a new class of reconfigurable computing systems.
The FPOA is composed of a coarse grained, polymorphous array of arithmetic, logic, and memory “silicon objects” that provide familiar building blocks for the system engineer to build applications. These objects can be thought of as programmable processing elements. The functionality can be reconfigured dynamically by the application using the homogeneous interconnect topology, or a complete reconfiguration can take place by in-circuit reprogramming of the silicon array. The technology is available as a commercial, stand-alone DSP device, and could also be incorporated into an SoC architecture to provide an embedded, reconfigurable co-processing resource.
For the proposed program, VTI will commercialize a board level product and supporting software application development tools to easily integrate the FPOA technology into deployable system architectures. VTI also proposes to work with the University of Pittsburgh to perform a controlled “apples to apples” comparison between FPOA and FPGA technology. The University of Pittsburgh has created an Automatic Speech Recognition hardware architecture called Speech Silicon and is using a Xilinx Virtex 4 FPGA for prototyping. By porting this Speech Silicon to the FPOA, a comparative benchmark will be achieved. Additionally, the improved performance for Speech Silicon is expected to enable it to handle multiple voice channels.
5. “External QoS Management System for Backend Database Servers”
Carnegie Mellon University
There is a strong economic motivation for online retailers (e.g. Amazon) to provide lower response times to their more important, .big-spending. clients, so as not to lose these clients. It is likewise financially desirable to offer certain clients Service Level Agreements (SLAs) to guarantee them certain QoS goals, such as high throughput or low mean response time. Because the dominant time associated with serving a dynamic web request is the time spent at the backend database/storage system (rather than the front-end web/app server), it is important that the QoS be applied to the backend database/storage system to control the time spent there. Yet, commercial database management systems (DBMS) do not provide effective service differentiation between different classes of transactions. The newest research in service differentiation for backend DBMS is our own work, funded by a 2003-2004 PDG grant. In this work we provide the first implementation of priority differentiation internally within the DBMS by modifying the lock manager. While this research is extremely effective in providing priority differentiation, it is not a portable approach in that it depends on changing DBMS internals.
The goal of the current proposal is to design a new approach for service differentiation in backend servers which is portable across different DBMS, storage devices, caches, and other backend servers. We will develop an External QoS Management System (EQMS), that sits between the web server (or the application server) and the backend server. The key idea of the EQMS is to hold back requests and control the order in which they are submitted to the backend server to limit the concurrency in the backend server. By limiting concurrency we can achieve complex QoS goals such as class-based response time or throughput targets, targets on percentiles of the response time, or reducing per-class variability. This approach of encapsulating QoS functionality in the EQMS outside the database has many advantages: it doesn't require changes to the DBMS and hence is portable across DBMS and is marketable as an independent black-box device. The approach is also effective across different, changing workloads, since the scheduling isn't tied to a particular bottleneck resource inside the DBMS.
6. “Hybrid Layout Strategies for Large SoC Designs”
Carnegie Mellon University
Automatic logical and layout synthesis tools revolutionized design in the last decade, making it possible for small teams of designers to reliably create large, complex multi-million-gate designs. Large system-on- chip (SoC) designs today also incorporate thousands of large, pre-designed blocks (called “macros”) which allow integration of complex memories, and reuse of previously designed blocks . In the flow from logic to layout to chip, the placement task remains a key step: it determines the location of each design element on the surface of the chip (macros and gates), and predetermines much of the achievable cost and speed of the final chip. Despite the existence of many mature products, the market space remains remarkably active, with improved tools from large players (e.g., SOC Encounter from Cadence) competing with promising startup offerings not far out of beta (e.g., Pinnacle from Sierra DA). Our goal in this proposal is to evolve a radically new CMU placement tool the final steps toward being commercially viable.
Based on our experience with the CMU Warp placer prototype, we believe that we must address two issues to move toward a production-quality placer. First, we propose to extend the engine to better handle large mixed-size layout problems with thousands of macroblocks and millions of gates. The warping concept is exceptionally adept at keeping related gates close to each other during placement; unfortunately, this also means that it is difficult for force gates away from large, area-consuming macros during placement evolution. We propose to develop the necessary numerical techniques to resolve these area conflicts more optimally during the early phases of placement. Second, we propose to develop a new warping formulation that leverages ideas from very recent innovations in so-called “analytical” placement engines. Like warping, the analytical placers use nonlinear optimization to drive layout improvement, but create extremely large problems (e.g., 10 million variables) requiring several CPU days to place. However, these formulations produce exceptionally good results. We propose to extend the “move the grid, not the gates” warping strategy in a way that creates a hybrid placement technique that retains the efficiency of warping, but with the quality of the analytical engines.
7. “Hardening Ad-Hoc Networks with Secure Coprocessors”
The University of Pittsburgh
Mobile ad-hoc networks enable nodes to communicate wirelessly without any network infrastructure. They can have important applications in tactical military communications and emergency response. However, they have many vulnerabilities. Cryptographic techniques have been proposed for securing such networks. However, cryptography requires efficient and robust key management and revocation, which can be very difficult to achieve in ad hoc networks. Cryptography also cannot prevent forwarding misbehavior. Reputation systems have been proposed as a defense against the latter, but attackers may leverage this defense to malign legitimate nodes. Additionally, in such networks, attackers are often able to capture legitimate nodes and retrieve their keys or other private information.
We propose the use of secure coprocessors for hardening ad hoc networks against the mentioned threats. The Trusted Computing Group (TCG) has published specifications for low-cost, standard secure coprocessors, called Trusted Platform Modules (TPMs) that are embedded in an increasing number of computer models from IBM, HP, and other manufacturers. TPMs enable two new security features, attestation and sealing. Attestation allows a node to verify securely the configuration of a remote node. We will use attestation to guarantee that only nodes that have a safe configuration are allowed to participate in an ad-hoc network. Sealing enables storing data in a node such that the information can be retrieved only when the node is in the same (safe) configuration. We will use sealing to safeguard keys and other private information, such that capture of legitimate nodes by enemies is harmless: In their safe configuration, those nodes cannot attack the network, and if attackers modify the nodes’ configuration, sealing guarantees that the keys will no longer be available. Other private information (e.g., of military, medical, or financial significance) will also be sealed and unavailable to enemies.
Implementation of these features requires operating system enhancements such that configuration modifications after boot time do not go unnoticed, and automatically close network associations or files that depend on the previous, safe configuration. Existing drivers and operating systems implement at most some of the necessary functionality.
We will develop a Linux Security Module that will enable both attestation and sealing in a safe and robust manner on existing processors. We will investigate how to integrate these features with secure ad-hoc network protocols and an embedded cryptographic file system. We will build prototypes implementing our techniques and will use them to test the security of our defenses against actual attacks on ad-hoc networks. We will also measure the performance impact of our defenses.
8. “JAUS Conformance and Interoperability Test Suite”
CoroWare Test Labs, Inc.
This program will develop a prototype of a JAUS Conformance and Interoperability Test Suitethat will provide a set of branded JAUS conformance and interoperability testing tools to vendors that develop unmanned robotic systems.
CoroWare will create a subsidiary corporation, CoroWare Testing Labs, which will be established in Pittsburgh, thereby enabling The Technology Collaborative to accelerate the robotics market and grow the region's world-class assets in Robotics. CoroWare Testing Labs will 1) develop and support the conformance and interoperability test suite 2) provide conformance and interoperability testing services for vendors that want to demonstrate that their products and 3) ensure implementations meet the requirements and criteria specified in the JAUS specifications
