Within today's high-speed digital and analog circuitry, fundamental connector components and packages rely on dielectric materials not only to position conductors mechanically, but also to maintain specific electrical properties. The electrical properties of these materials must be known to high accuracy during the analysis, design, and modification cycles of new high-speed components. To date, no comprehensive study has been completed that compiles important electrical values for commonly used high-speed dielectric materials for connectors. Engineers are left to design components based upon extrapolations from dielectric material properties that are often listed at lower frequencies. The challenge for industry is to understand how material properties above 1 GHz will influence device functionality and design. The short design-to-market cycle has forced electronic component manufacturers to rely more on accurate simulation, which is dependent on material property data. Material properties that must be understood include relative permittivity, relative permeability, conductivity, electrical loss tangent, and magnetic loss tangent. Anisotropic materials, such as most PWB laminates and many plastics, need to be characterized in several directions. The objective of the proposed project is to develop a suite of characterization techniques for commercial dielectric materials. This collaborative project between Penn State and local companies will provide the data and tools that will be necessary for design and manufacture of the next generation of electronic components.

The development of a 600 V, 10 A, silicon carbide (SiC) Schottky rectifier is proposed. SiC offers 100X smaller on-state resistance as compared to SiC rectifiers, enabling very high power density, modular power supplies for use in next-generation telecom, computer server, network and storage applications. The extremely high speed of such rectifiers offers significantly increased power supply efficiencies. Higher efficiency obtained just due to the introduction of these rectifiers may result in $1-2 B savings in energy savings, and correspondingly reduce pollution in the United States. While lower current SiC Schottky rectifiers offered by Infineon (Germany) are rapidly being accepted by computer power supply manufacturers, 10 A remains a key threshold for server, telecom and storage applications.

This proposal addresses the design and demonstration of an ultra-low-power low-data-rate short-range highly-integrated CMOS radio frequency (RF) transmitter that will send comparatively low bandwidth signals (below 64 kilobits/second, and frequently below 10 kilobits/second) from battery powered remote sensors to nearby receivers. We propose to deliver the results of this research project in three phases. We propose to study existing radio transmitter architectures and modulation methods in order to select the best on for this application. We will design a specific instance of this radio transmitter architecture in a low cost CMOS IC fabrication process (either 0.5um or 0.35um CMOS).

SoC XML security architecture that will deliver AES encryption and decrypt XML elements at rates unattainable by software solutions and reduce encryption I/O traffic by up to 50% in comparison to existing hardware solutions. The project will develop a gigabit AES encryption core for use in HTTPS/TLS and XML encryption acceleration. A hardware XML parser and content inspection logic will be developed to identify encrypted XML elements for further decryption before returning the XML message to the host system.

We propose the research and development of on-chip thin film micro resonance devices for RF and microwave frequency control applications. The devices are designed and fabricated based on piezoelectric AlN-on-Si with thickness vibration mode that can produce fundamental resonance frequency in the range from 500 MHz to 15 GHz depending on the thickness of AlN thin film and its electromechanical properties. Three major research and development issues will be particularly addressed in this research: 1) AlN thin film deposition and patterning with a goal to achieve c-axis orientation to achieve optimal piezoelectric properties for resonator fabrication. 2) Microfabrication of suspended membrane type or solidly mounted type RF and microwave frequency resonators based on piezoelectric AlN thin films. 3) Temperature-frequency stability control though appropriate selection and processing of substrate materials and through DC bias field tuning of AlN thin film's elastic properties. Piezoelectric thin film materials such as PbZrxTi1-xO3 (PZT), ZnO and AlN have been studied for bulk acoustic wave resonator devices for RF and microwave filter applications. Among these materials, AlN is particularly attractive due to its very high acoustic velocity and its excellent mechanical quality factor. These characteristics make it possible to design and fabricate high frequency (up to 15 to 20 GHz) narrow bandwidth filters for communication devices. However, on-chip fabrication of high quality piezoelectric AlN thin film device and its integration with other electronics still remains a challenge. Especially, very few studies have been performed on its frequency-temperature stability. In this project we will systematically investigate the AlN thin film deposition and patterning with a goal to achieve high quality AlN films with strong c-axis orientation. Processing strategies such as the use of optimum sputter deposition conditions and suitable nucleation layers for thin film growth and orientation control will be investigated to achieve this goal. Studies of suitable etching and patterning methods will also be studied to fabricate both suspended membrane type and solidly mounted AlN resonators. A DC bias field control or tuning of the frequency method will be investigated for achieving good frequency-temperature stability.

Thar Technologies, Inc., an associate member company of the Pittsburgh Digital Greenhouse, proposes a research effort to investigate the design and development of a novel cooling solution for printed circuit boards (PCBs). The proposed solution exploits certain advantages of high pressure processing technology to create a means of active, on-board thermal management: an embedded, variable-design microscale cooling system with increased functionality, applications, scalability and environmental friendliness that is cost effective and energy efficient. The final system will have an independent, variable design tool to enable it to be designed to the specifications of nearly any PCB. This proposal addresses feasibility of the concept and is forecasted to be the equivalent of the first phase of a three phase program. Successful completion of the project will deliver substantial benefits to both providers and users of PCBs. Commercialization of this novel solution will be two-pronged and directed toward manufacturers and applications developers. Since boards and any integrated circuits are designed to perform within specifications within a given temperature range, adjusting those parameters leads to frying the component parts or increasing the performance. The reduction in operating temperatures increases processing speeds, reduces volatility, decreases degradation of components, prolongs component lifecycles and also encourages the development of new software programs and peripheral components, all of which can be used as tools of product differentiation and competitive advantage. There will also be tremendous, direct benefits to the System-on-a-Chip (SoC) industry. A board-level cooling solution will enable stable board-chip interaction and therefore increased system stability.

We are proposing a novel strategy to improve the robustness of speech recognition and speaker verification algorithms. The proposed strategy is based on an innovative approach that departs radically from commonly used mechanisms for speech recognition and speaker verification. Preliminary research demonstrates a superior performance of the proposed methods in the context of text-dependent speaker verification with cooperative speakers in a low noise environment. The overall complexity of the proposed algorithm is comparable to the complexity of algorithms in current commercial products. It establishes a viable alternative to standard procedures, especially for embedded speech processing systems.

The following proposal, submitted by Novocell Semiconductor, Inc.is seeking PDG funding to develop various architectures for non-volatile memories that can interface directly with distributed circuitry. This effort will be concentrated on incorporating these Non-Volatile (NV) memories into architectures that are compatible with general end-use applications requiring low density OTP (One-Time Programmable) Memory. For these applications, specific memory architectures are needed to facilitate the use of these NV memory blocks in embedded applications and this research supports this goal. These NV memories are targeted at applications where stored data is needed by distributed circuitry and avoiding data bus interfaces to each circuit block will greatly decrease the overhead circuitry for each circuit block. In this proposed project, various architectural approaches will be designed, and implementations of these architectures with interfaces to sample circuitry will be designed and fabricated on test chips and the operation will be verified and characterized. Test chips will be fabricated in 2 different process technologies. The results of this work are expected to yield at least two architectural approaches that can be selectively used in embedded memory applications for efficient interface to this NV memory technology.

In this research project, we plan to mount a high precision quartz crystal directly on a CMOS chip enabling the closest coupling of the crystal, the oscillator circuit, the phase lock loop circuit, and the digital system. Apart from growing the quartz crystal on a silicon substrate, our approach will result in the next most compact form factor that is highly desirable for wireless portable devices. Moreover, we expect the following benefits and we plan to explore them further through this research project: (1) improved temperature compensation or stabilization of the quartz crystal due to close proximity of the crystal and the circuits, (2) elimination of an off-chip interface for the crystal, (3) reduced power consumption and an improved noise characteristic, (4) improved frequency stabilization and precision, (5) elimination of separate crystal packaging, (6) improved reliability, and (7) cost reduction of final system-on-chip products.